Semiconductor Exports from India. Design, ATMP, Compliance, and Opportunities

What Is India's Semiconductor Export Position?

The global semiconductor market crossed $240 billion in 2025 and is projected to reach $300 billion by 2030. India's role in this market has historically been concentrated in chip design. The country employs roughly 20% of the world's semiconductor design engineers, with over 130,000 professionals working across captive design centres and fabless companies in Bengaluru, Hyderabad, Chennai, Pune, and Noida.

Where India is moving beyond design is in Assembly, Testing, Marking, and Packaging (ATMP). Micron's $2.75 billion ATMP facility in Sanand, Gujarat, is operational and processing memory chips. Tata Electronics is building ATMP capacity alongside its fab ambitions. The OSAT (Outsourced Semiconductor Assembly and Test) segment is where India can capture value quickly, without waiting for multi-year fab construction timelines.

Fab manufacturing is the long game. The 0 billion India Semiconductor Mission (ISM), launched in 2021 and restructured in 2023, is funding India's first commercial fabs. The Tata-PSMC fab in Dholera, Gujarat, targets 28nm process nodes. Not cutting-edge, but covering a massive segment of automotive, industrial, and IoT chips where global demand consistently outstrips supply.

India's semiconductor value chain participation

20%

of global chip design workforce

0B

India Semiconductor Mission outlay

130,000+

semiconductor design engineers

What India Exports in Semiconductors

India's semiconductor exports span design services, physical components, equipment, and tools. Each category has different compliance requirements and export procedures.

IC Design Services (Fabless)

India's largest semiconductor export by value. Captive design centres of Qualcomm, Intel, AMD, Texas Instruments, Broadcom, and others export chip designs, verification IP, and RTL code. These are classified as software/IP exports and filed under SOFTEX through STPI or SEZ units. Fabless Indian companies like Signalchip, Saankhya Labs, and Mindgrove also export custom ASIC/SoC designs.

Assembled, Tested, and Packaged Chips (ATMP)

With Micron's Sanand facility and upcoming Tata Electronics ATMP lines, India is beginning to export finished packaged chips. Raw wafers are imported, processed through die attach, wire bonding, encapsulation, testing, and marking, then re-exported as finished semiconductor devices.

PCB Assemblies and Printed Circuit Boards

India has a growing PCB manufacturing base. Companies like AT&S India, Ascent Circuits, and Shogini Technoarts export multi-layer PCBs and flex circuits. PCBAs (populated boards) are exported for automotive, telecom, and consumer electronics applications.

Compound Semiconductors (GaN, SiC)

Gallium Nitride (GaN) and Silicon Carbide (SiC) are critical for power electronics, EV charging, 5G infrastructure, and defence applications. CG Power is setting up a compound semiconductor fab under ISM. ISRO and DRDO have indigenous GaN capabilities for radar and communication systems.

MEMS and Sensors

Micro-Electro-Mechanical Systems for automotive, medical, and IoT applications. India exports pressure sensors, accelerometers, and gyroscopes.

Display Panels (under PLI)

Display fabs under the PLI scheme for IT hardware and large-scale electronics manufacturing. AMOLED and LCD panel assembly for smartphones and automotive.

EDA Tools

Electronic Design Automation software developed by Indian teams. Major EDA companies (Synopsys, Cadence, Siemens EDA) have large India R&D centres contributing to global tool development.

Test and Measurement Equipment

Semiconductor test equipment, probe stations, and measurement instruments. Exported under HS 9030 for use in fab and ATMP facilities globally.

Regulatory Framework

Semiconductor exports sit at the intersection of multiple regulatory regimes. Indian export controls, multilateral arrangements, and extraterritorial regulations from the US, EU, and Japan. Understanding which regime applies to your specific product is the first compliance step.

Export Controls and Restrictions. Detailed

This section breaks down each major control regime as it applies to semiconductor products and technologies exported from India.

EAR Category 3. Process Node Thresholds

The US Bureau of Industry and Security (BIS) controls exports of advanced semiconductors based on process node and performance thresholds. As of 2025, chips manufactured at 14nm/16nm and below face heightened controls for certain destinations. Logic chips, DRAM below 18nm half-pitch, and NAND flash with 128 layers or more are subject to licence requirements for exports to China and other restricted destinations.

For Indian exporters, this matters primarily through the FDPR. If your chips were fabricated at a foundry using US-controlled equipment (which nearly all fabs worldwide do), the finished chips may be subject to US controls regardless of where they were made.

Advanced Computing Rule. TOPS Thresholds

The October 2022 advanced computing rule (updated in October 2023 and further refined in 2024) restricts exports of chips exceeding certain total processing performance (TOPS) thresholds to China and Macau. The thresholds target AI accelerators and high-performance GPUs.

Indian companies designing AI accelerators or high-performance computing chips must assess whether their products exceed these TOPS thresholds before exporting to restricted destinations, even if the chips are designed in India.

Foreign Direct Product Rule (FDPR)

The FDPR is the most far-reaching US export control mechanism for semiconductors. It provides that any product made using US-origin technology, software, or equipment is subject to US export controls, regardless of the country of manufacture.

Practically, this means: if an Indian ATMP facility uses US-origin test equipment, the packaged chips may be subject to EAR. If an Indian fabless company uses Synopsys or Cadence EDA tools (both US companies) to design a chip, the resulting design and any chips manufactured from it may fall under FDPR. The FDPR does not apply to all products (it is entity-specific and destination-specific) but the compliance assessment is mandatory.

Wassenaar Arrangement Controls

The Wassenaar Arrangement controls semiconductor manufacturing equipment including lithography systems (especially EUV and advanced DUV), chemical vapour deposition (CVD) tools, physical vapour deposition (PVD) systems, etching equipment, ion implantation systems, and photomask/reticle equipment. India is a Wassenaar member and implements these controls through the SCOMET list . EDA software for designing ICs at controlled process nodes is also covered.

SCOMET Category 3. Indian Controls

India's SCOMET (Special Chemicals, Organisms, Materials, Equipment, and Technologies) list Category 3 covers electronics, computers, and information security items. Key controlled semiconductor items include radiation-hardened ICs (total ionising dose >5 x 10³ Gy), certain FPGA families with high logic cell counts, high-speed ADCs and DACs above specified sampling rates, and military-grade semiconductor devices. Exports of SCOMET-listed items require a licence from DGFT. See our detailed SCOMET guide for the application process.

Encryption Chips. Dual-Use Controls

Semiconductor devices with built-in encryption capabilities fall under dual-use controls. SCOMET Category 3 covers cryptographic ICs, and the Wassenaar Arrangement has specific entries for encryption hardware. The threshold is typically symmetric encryption exceeding 56 bits or asymmetric encryption exceeding 512 bits (RSA) or 112 bits (ECC), though mass-market exemptions apply to many commercial products. Indian exporters of secure microcontrollers, HSMs (Hardware Security Modules), and TPM chips must assess whether their products qualify for mass-market treatment or require individual export licences.

HS Codes for Semiconductor Exports

Correct HS code classification determines duty rates, export incentives, and whether export controls apply. Misclassification can trigger penalties, delayed shipments, and compliance violations.

India Semiconductor Mission Benefits

The ISM offers substantial fiscal support across the semiconductor value chain. For companies setting up manufacturing or design operations in India with an export orientation, these incentives significantly alter the cost calculus.

50% fiscal

Fab Setup (Modified Scheme)

50% of project cost for semiconductor fabrication facilities. Covers silicon fabs, display fabs, and compound semiconductor fabs. Capital expenditure on land, building, plant, and machinery qualifies.

50% fiscal

Compound Semiconductor / ATMP / OSAT

50% of capital expenditure for compound semiconductor (GaN, SiC, GaAs), ATMP, and OSAT facilities. This is the fastest path for Indian companies to enter semiconductor manufacturing with export capability.

50% DLI

Design Linked Incentive (DLI) Scheme

50% support for semiconductor design companies covering design expenditure and product deployment. Targets fabless companies designing ASICs, SoCs, FPGAs, and analog/mixed-signal ICs. Also covers EDA tool licences and foundry tape-out costs.

Major ISM-funded projects

Design Services Export. India's Current Strength

IC design services are India's most mature semiconductor export. Over 2,000 chip designs are taped out annually from Indian design centres. The compliance framework for exporting design services differs significantly from physical goods exports.

SOFTEX Filing for IC Design IP

IC design services exported from India are treated as software exports. Companies must file a SOFTEX declaration with their authorised dealer bank through STPI (Software Technology Parks of India) or the relevant SEZ authority. The SOFTEX form captures the nature of the design service, the foreign exchange earned, and the buyer details.

For captive design centres (Indian subsidiaries designing chips for a parent company abroad), the transfer pricing documentation must reflect arm's length pricing for the design services. The OECD Transfer Pricing Guidelines and Indian transfer pricing rules under Sections 92-92F of the Income Tax Act apply.

Tax and Incentive Framework

• GST zero-rated under LUT: Export of design services is zero-rated for GST purposes. File a Letter of Undertaking (LUT) to export without paying IGST. See our GST LUT filing guide.
• DTAA benefits: Double Tax Avoidance Agreement benefits apply to royalty and licence payments received from countries with which India has DTAAs. Withholding tax rates for design IP licensing vary by treaty.
• STPI/SEZ benefits: Design companies operating from STPI units or Special Economic Zones can avail income tax benefits, duty-free imports of design tools and equipment, and simplified customs procedures.
• IP protection: File patents before exporting design IP. India's patent filing should ideally precede or coincide with international filings under PCT. Design registration under the Designs Act, 2000 can protect the physical layout of integrated circuits.

ATMP Export Compliance

ATMP (Assembly, Testing, Marking, and Packaging) exports follow a distinct workflow: import raw wafers or dies, process them in India, then re-export finished packaged chips. The compliance framework combines customs, export controls, and quality certification requirements.

Import-Process-Re-Export Workflow

1. Import raw wafers or dies. Duty structure under ISM provides concessional customs duty on semiconductor raw materials. Wafers (HS 3818) and unpackaged dies attract reduced or zero basic customs duty for ISM-approved facilities.
2. Process in India. Die attach, wire bonding or flip-chip, encapsulation/moulding, marking, electrical testing, burn-in, and final visual inspection.
3. Export finished chips. Packaged and tested semiconductor devices exported under HS 8541 or 8542 with appropriate country of origin marking.

Customs and Zone Options

ATMP facilities can operate under several customs frameworks, each with different duty and compliance implications.

• Bonded warehouse: Import wafers without paying duty, process, and re-export. Duty payable only on goods cleared for domestic consumption. See our bonded warehouse guide.
• EOU (Export Oriented Unit): Duty-free imports with obligation to export a minimum percentage of production. Suitable for ATMP units primarily serving export markets. See our EOU compliance guide.
• SEZ: Treated as foreign territory for customs purposes. No import duty, no GST, simplified procedures. Most ISM-funded ATMP facilities are located in or near SEZs.

Quality Certifications

Export customers (especially in automotive, aerospace, and defence) require specific quality certifications for packaged semiconductors.

Country of Origin Marking

Packaged chips must carry country of origin marking. For chips assembled and tested in India from imported wafers, the country of origin is India (substantial transformation occurs during ATMP). Marking must be permanent (laser-etched or ink-stamped) and comply with the importing country's requirements. US CBP requires "Made in India" or "Product of India," while EU requires origin declaration on commercial documentation.

US CHIPS Act Guardrails. Impact on India

The CHIPS and Science Act of 2022 provides $52.7 billion for US semiconductor manufacturing and research. The guardrails provisions directly affect companies globally (including in India) that receive CHIPS funding or partner with CHIPS-funded entities.

The 10-Year Expansion Restriction

Recipients of CHIPS Act funding cannot materially expand semiconductor manufacturing capacity in countries of concern (defined as China (including Hong Kong and Macau), Russia, Iran, and North Korea) for 10 years from the date of the award. "Material expansion" means any expansion that increases a facility's production capacity by more than 5% for leading-edge and advanced facilities, or 10% for current-generation and mature-node facilities.

India as a Friend-Shoring Destination

The CHIPS Act guardrails position India favourably. Global semiconductor companies looking to diversify manufacturing away from China can expand in India without triggering guardrail violations. This is a key driver behind Micron's Sanand investment and Tower Semiconductor's India partnership. India's position in the Quad (alongside the US, Japan, and Australia) further strengthens its status as a trusted semiconductor partner.

Supply Chain Documentation and End-Use Monitoring

Indian companies partnering with CHIPS-funded entities may need to maintain detailed supply chain documentation showing that chips produced with CHIPS-funded technology are not being diverted to countries of concern. End-use monitoring can include audits, site visits, and documentation requirements that go beyond standard export compliance. Build these documentation systems early. Retrofitting them is far more expensive than designing them into your operations from the start.

Key Markets for Indian Semiconductor Exports

Indian semiconductor exports flow primarily to markets where friend-shoring policies align with India's strengths. The regulatory environment for each destination differs significantly.

Challenges

Despite the momentum, India's semiconductor export ambitions face structural constraints that will take years to resolve.

No Indigenous Fab at Advanced Nodes

India's first commercial fab (Tata-PSMC) targets 28nm. Several generations behind TSMC's 3nm and Samsung's 5nm. While 28nm covers a large market (automotive, industrial, IoT), India cannot currently manufacture the cutting-edge chips used in smartphones, AI accelerators, or advanced computing. This limits the value India can capture in the semiconductor export chain.

Talent Gap in Manufacturing

India has deep talent in chip design but limited experience in fab operations, process engineering, yield management, and equipment maintenance. The ISM has initiated training programmes, and partnerships with established foundries (PSMC from Taiwan, Tower from Israel) are meant to bridge this gap. However, building a workforce capable of running a fab at global quality standards takes 5-10 years.

Infrastructure Requirements

Semiconductor fabs require ultra-pure water (up to 10 million litres per day for a large fab), uninterrupted power supply with 99.999% uptime, vibration-free foundations, and cleanroom environments at ISO Class 1-4. Gujarat's Dholera SIR is being built out for these requirements, but infrastructure readiness remains a risk factor for project timelines.

IP Protection Concerns

Global semiconductor companies considering India for design or manufacturing operations need confidence in IP protection. India's enforcement of semiconductor layout design rights (under the Semiconductor Integrated Circuits Layout-Design Act, 2000) has been limited. Strengthening IP enforcement is critical for attracting high-value semiconductor investments.

Equipment Dependency

India has no indigenous semiconductor equipment manufacturing. All fab and ATMP equipment must be imported from the US (Applied Materials, Lam Research, KLA), Netherlands (ASML), Japan (Tokyo Electron, Screen), and Germany (SUSS, Aixtron). This creates dependency and exposes India to equipment export controls imposed by these countries.

Frequently Asked Questions

Update history

• 2026-08-12 First published.